Segger J-Link Debugger

Note

  • This section contains preliminary information and is work-in-progress.

The CMSIS-Toolbox organizes for debuggers projects and configuration options. This chapter explains the usage of the Segger J-Link GDB Server in combination with the CMSIS-Toolbox.

  • Extended Options explains additional configuration features that are required in specific use-cases.

Other manual sections describe how to configure debuggers:

Extended Options

The section Debugger Configuration - J-Link Server contains the J-Link configuration for typical systems.

telnet:

J-Link supports a Telnet service that connects to character I/O functions. Character I/O is supported via Semihosting (or SEGGER RTT channel 0). Currently only semihosting is configured for the primary core.

telnet: Description
- mode: Required Redirect output: off (default), server, console, monitor.
    pname: Optional Identifies the processor (not required for single core system).
    port: Optional Set TCP/IP port number of Telnet Server (default: 4444, 4445, ... incremented for each processor).
Telnet Mode Description
server Serial I/O to Telnet server port
console Serial output to console (Debug console in VS Code).
monitor Serial I/O via TCP/IP port to VS Code Serial Monitor.
off Serial I/O disabled.

Note

  • The Telnet service is always enabled for the J-Link GDB Server. The mode off turns off the data source (semihosting, SEGGER RTT).
  • When no telnet node is added then Serial I/O to all processors is set to mode off.

connect:

Configures the behavior for connecting J-Link to the hardware target for interactive debug.

connect: Description
    mode: Required Selects the connect mode: attach, halt (default).
Connect Mode Description
attach Do not change state of the core(s). No reset is executed.
halt Halt core(s) after connect.

reset:

Configures the reset behavior for each core when a reset is requested during interactive debug.

reset: Description
- pname: Optional Identifies the processor (not required for single core system).
    type: Required Selects the reset type: hardware, system (default), core.
Reset Types Description
hardware Use the J-Link reset pin reset mode.
system Use the J-Link normal reset mode.
core Use the J-Link core reset mode.

Examples:

debugger:
  name: J-Link Server       # default connect, halt and reset behavior
debugger:
  name: J-Link Server
  connect: attach           # connect without reset and without CPU state change
  reset:
    - type: system          # use system reset
debugger:
  name: J-Link Server
  connect: halt             # halt CPU after connect
  reset:
    - pname: Core0          # for Core0
      type: hardware        # use hardware reset
    - pname: Core1          # for Core1
      type: core            # use core reset

trace:

Note

The trace: feature is under development. This section provides a preview.

J-Link supports SWO Trace.

trace: Description
    input-clock: Required Trace input clock frequency in Hz.
    port-type: Optional Set trace port transport mode. Currently only SWO-UART is accepted.
    output-clock: Optional Trace output clock for the selected port type. For SWO-UART mode this is the baudrate.
    server-port: Optional Set TCP/IP port number of Trace server (default: 5555).

Trace Clocks

  1. Trace input-clock is the frequency of the clock signal that goes into the trace port component. It equals the CPU clock frequency for the majority of systems with trace from a single core. For more complex multi-core systems, the clock is normally derived from the system clock. Refer to the device manual and setup to find the exact value.
  2. Trace output-clock is the clock frequency of the trace output signal. It is used to configure trace capture of the debug unit, and to calculate trace port prescaler values that need to be programmed. If not provided or if the value is 0, then a best matching output frequency is automatically calculated based on input-clock and supported trace capture frequencies/baudrates of the debug unit.