i.MXRT105x Middleware Pack  
CMSIS-Drivers for NXP i.MXRT105x devices
 
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CMSIS-Driver for MCI Interface

CMSIS-Driver for MCI Interface Setup

The CMSIS-Driver for MCI Interface requires:

  • USDHC Pins
  • USDHC Clock

Valid pin settings for USDHC1 peripheral on EVKB-IMXRT1050 evaluation board are listed in the table below:

# Peripheral Signal Route to Identifier Direction Pull Up/Down Config Pull/Keeper select Pull/Keeper enable Drive strength Slew rate
J2 USDHC1 DATA,3 GPIO_SD_B0_05 SD1_D3 Input/Output 47k Ohm Pull Up Pull Enabled R0 Fast
H2 USDHC1 DATA,2 GPIO_SD_B0_04 SD1_D2 Input/Output 47k Ohm Pull Up Pull Enabled R0 Fast
K1 USDHC1 DATA,1 GPIO_SD_B0_03 SD1_D1 Input/Output 47k Ohm Pull Up Pull Enabled R0 Fast
J1 USDHC1 DATA,0 GPIO_SD_B0_02 SD1_D0 Input/Output 47k Ohm Pull Up Pull Enabled R0 Fast
J4 USDHC1 CMD GPIO_SD_B0_00 SD1_CMD Input/Output 47k Ohm Pull Up Pull Enabled R0 Fast
J3 USDHC1 CLK GPIO_SD_B0_01 SD1_CLK Output 100k Ohm Pull Down Keeper Disabled R0 Fast
D13 GPIO2 goio_io,28 GPIO_B1_12 SD1_CD Not specified 100k Ohm Pull Down Keeper Enabled R0/6 Slow

The rest of the settings can be at the default (reset) value.

For other boards or custom hardware, refer to the hardware schematics to reflect correct setup values.

This driver uses special signal identifiers in order to enable SD Card Detect and Write Protect pin functionality. These identifiers can be optionally used and must be assigned to signal connected to card detect or write protect pin on SD card socket. Each MCI driver instance uses its own identifiers which can be assigned to signals as follows:

MCI instance Peripheral Identifier Functionality
0 USDHC1 SD1_CD Card Detect
0 USDHC1 SD1_WP Write Protect
1 USDHC2 SD2_CD Card Detect
1 USDHC2 SD2_WP Write Protect

In the MCUXpresso Config Tools, make sure that the following pin and clock settings are made (enter the values that are shown in italics):

  1. Under the Functional Group entry in the toolbar, select Board_InitUSDHC
  2. Modify Routed Pins configuration to match the settings listed in the table above
  3. Click on the flag next to Functional Group BOARD_InitUSDHC to enable calling that function from initialization code
  4. Go to Tools - Clocks
  5. Go to Views - Details and configure USDHC1_CLK_ROOT to frequency below or equal to 198MHz. USDHC1_CLK_ROOT source can be selected from PLL2_PFD2_CLK or PLL2_PFD0_CLK which must be configured accordingly.
  6. Click on Update Project button to update source files