CMSIS-Driver_STM32  
CMSIS Drivers for STMicroelectronics STM32 Series devices
 
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I2C

Revision History

  • Version 3.0
    • Initial release

Requirements

This driver requires the STM32 device specific HAL and STM32CubeMX (CubeMX) initialization code generator. The driver instance is mapped to hardware as shown in the table below:

CMSIS Driver Instance STM32 Hardware Resource
Driver_I2C1 I2C1
Driver_I2C2 I2C2
Driver_I2C3 I2C3
Driver_I2C4 I2C4
Driver_I2C5 I2C5
Driver_I2C6 I2C6
Driver_I2C7 I2C7
Driver_I2C8 I2C8

Deviations

This driver has the following deviations from the CMSIS-Driver specification:

Conceptual deviations:

  • CubeMX generated initialization code (function MX_I2Cn_Init) already configures the peripheral. Power, clocks, pins, and interrupts are enabled after execution of initialization that executes in main.c.

Functional deviations:

  • Initialize:
    • depends on the code generated by CubeMX.
    • does not initialize the pins.
  • Uninitialize:
    • does not de-initialize the pins.
  • PowerControl:
    • depends on the code generated by CubeMX.
    • low-power mode is not supported by HAL.
  • MasterTransmit and SlaveTransmit:
    • maximum number of data bytes supported by HAL with a single transmit request is 65535.
  • MasterReceive and SlaveReceive:
    • maximum number of data bytes supported by HAL with a single receive request is 65535.

CubeMX Configuration

This driver requires the following configuration in CubeMX:

  • clock: I2C peripheral clock.
  • peripheral: I2C peripheral configured as I2C and Parameter Setting configured as desired.
  • pins: I2C SCL and SDA pins.
  • DMA: optional DMA configuration for transfers.
  • interrupts: enabled I2C event and I2C error interrupts and IRQ handlers that Call HAL handlers and enabled DMA interrupts and IRQ handlers that Call HAL handlers.

Notes

  • configuration information in the MX_Device.h file is based on CubeMX configuration.
  • DMA configuration can differ between devices series so configure DMA as required by the used device.
  • for DMA usage on devices with cache, ensure that data buffers for Transmit and Receive functions are in non-cacheable memory, or ensure that memory for transmit is updated (cache clean) before Transmit function is called and that memory containing received data is updated after the reception finishes (cache invalidate).
  • some DMA controllers can only access specific memories, so ensure that proper memory is used for the buffers according to the DMA requirement.

Example

Pinout & Configuration tab

  1. In the Pinout view window click on a pin and select it's functionality:
    Pin Functionality
    PB6 I2C1_SCL
    PB7 I2C1_SDA

  2. Under Categories: Connectivity select I2C1:

    Mode:

    • Mode: I2C

    Configuration:

    • Parameter Settings: as desired
    • GPIO Settings:
      Pin Name Signal on Pin Pin Context.. GPIO output.. GPIO mode GPIO Pull-up/Pull.. Maximum out.. Fast Mode User Label
      PB6 I2C1_SCL n/a n/a Alternate Function Push Pull Pull-up Low n/a .
      PB7 I2C1_SDA n/a n/a Alternate Function Push Pull Pull-up Low n/a .

  3. Under Categories: System Core select DMA (might be different on other device series, or for some peripherals might be BDMA):

    Configuration:

    • DMA1, DMA2:

      Click on Add button and add DMA Requests as in table below:

      DMA Request Stream Direction Priority
      I2C1_RX DMA1 Stream 0 Peripheral to Memory Low
      I2C1_TX DMA1 Stream 1 Memory to Peripheral Low


  4. Under Categories: System Core select NVIC:

    Configuration:

    • NVIC:
      NVIC Interrupt Table Enabled Preemption Priority Sub Priority
      DMA1 stream0 global interrupt checked 0 0
      DMA1 stream1 global interrupt checked 0 0
      I2C1 event interrupt checked 0 0
      I2C1 error interrupt checked 0 0

    • Code generation:
      Enabled interrupt table Select for.. Generate Enable in.. Generate IRQ h.. Call HAL handler
      DMA1 stream0 global interrupt unchecked checked checked checked
      DMA1 stream1 global interrupt unchecked checked checked checked
      I2C1 event interrupt unchecked checked checked checked
      I2C1 error interrupt unchecked checked checked checked

Clock Configuration tab

  1. Configure To I2C1,2,3,5 (MHz): 100

Project Manager tab

  1. Under Advanced Settings:

    Generated Function Calls:

    Generate Code Function Name Peripheral Inst.. Do not generate .. Visibility (Static)
    checked MX_I2C1_Init I2C1 unchecked checked

Troubleshooting

Compilation errors

Error: I2Cn peripheral clock frequency is unknown!

  • Reason: peripheral clock frequency is not determinable from CubeMX configuration.
  • Solution: add User Constant with Name I2Cn_PERIPH_CLOCK_FREQ and Value of respective I2Cn peripheral clock frequency (in Hz).
  • Example: in the Pinout & Configuration tab, under Categories: Connectivity select I2C1, under Configuration: User Constants add Constant with Name I2C1_PERIPH_CLOCK_FREQ and Value of peripheral clock frequency (in Hz) as determined from the Clock Configuration or device documentation.